Data General microNOVA: Difference between revisions

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|6.3mm
|6.3mm
|32mm
|32mm
|}
== Startup Inconsistency ==
On the first day of attempting to use the MicroNova after bringing up the PSU with Usagi Electric it behaved inconsistently when being fully rebooted and would not always present the Debug Console (Memory Monitor). After some contemplating and manual reading I think there are three avenues to troubleshoot for a potential cause for this:
# There is a memory issue with one of the four RAM cards that is preventing the system from operating correctly
# The previously extremely dirty backplane needs more cleaning to have consistent contact
# The powerfail option I removed the batteries from is behaving oddly on poweroff and some CPU/RAM state may be held by the giant caps
Option 3 is the most recent theory based on reading through the manual ( 015-000050-00_microNOVA_Programmers_Reference_197602.pdf ) and reading the description of the powerfail option.
== Addressible Locations ==
''Note: This is a 4-bit bitslice machine that uses '''octal''' notation, not hex. Digit values range from 0 to 7.''
{| class="wikitable"
|+Internal CPU Cells (Not in Memory Map)
!Address (Octal)
!Description
|-
|0
|Accumulator 0
|-
|1
|Accumulator 1
|-
|2
|Accumulator 2
|-
|3
|Accumulator 3
|-
|4
|The program counter of the interrupted program.
|-
|5
|Stack Pointer
|-
|6
|Frame Pointer
|-
|7
|CPU and console controller (TTO) status where:
Bits 0-12 are reserved for future use.
Bit 13 is status of the carry bit when the console debug option received control.
Bit 14 is status of Interrupt On flag when the console debug option received control
Bit 15 is status of TTO Done flag when the console debug option received control
|-
|10
|Address of a location in the first 256 words of main memory that can be used by the console debug option for breakpoint transfers.
|-
|11
|Address of the most recent breakpoint
|-
|12
|User instruction at the address of the most recent breakpoint
|-
|17
|Contents of memory location 0775778
|}
{| class="wikitable"
|+Memory Locations
!Address (Octal)
!Description
|-
|2-36
|30 word bootstrap loader storage
|-
|100
|Programmed I/O bootstrap loader start location
|-
|377
|NIOS instruction loop location for booting from data channel device
|-
|077400-077777
|The console debug option consists of a program contained in 256 locations of read-only memory (ROM) that respond to addresses 077400-077777
|}
|}

Revision as of 14:52, 21 February 2025

Data General microNOVA
General Info
Manufacturer Data General
Condition Working
QR Code
(Click for Asset Tag)


Cards

Slot # Card Number Card Type
9
8
7 107 000648 03 Serial
6 107 000648 06 Serial
5 107 000759 01 Memory
4 107 000759 01 Memory
3 107 000624 01 Memory
2 107 000624 01 Memory
1 107 000533 03 CPU
  • Async Card 1

    Async Card 1

  • Async Card 2

    Async Card 2

  • MEM Card 1

    MEM Card 1

  • CPU Card

    CPU Card

  • Memory Card 1

    Memory Card 1

  • MEM Card 2

    MEM Card 2

  • Memory Card 2

    Memory Card 2

Power

Power Connector: https://www.mouser.com/ProductDetail/538-50-84-1120

Fuses
Current Rating Diameter Length
120 VAC 5A 6.3mm 32mm
240 VAC 3A 6.3mm 32mm

Startup Inconsistency

On the first day of attempting to use the MicroNova after bringing up the PSU with Usagi Electric it behaved inconsistently when being fully rebooted and would not always present the Debug Console (Memory Monitor). After some contemplating and manual reading I think there are three avenues to troubleshoot for a potential cause for this:

  1. There is a memory issue with one of the four RAM cards that is preventing the system from operating correctly
  2. The previously extremely dirty backplane needs more cleaning to have consistent contact
  3. The powerfail option I removed the batteries from is behaving oddly on poweroff and some CPU/RAM state may be held by the giant caps

Option 3 is the most recent theory based on reading through the manual ( 015-000050-00_microNOVA_Programmers_Reference_197602.pdf ) and reading the description of the powerfail option.

Addressible Locations

Note: This is a 4-bit bitslice machine that uses octal notation, not hex. Digit values range from 0 to 7.

Internal CPU Cells (Not in Memory Map)
Address (Octal) Description
0 Accumulator 0
1 Accumulator 1
2 Accumulator 2
3 Accumulator 3
4 The program counter of the interrupted program.
5 Stack Pointer
6 Frame Pointer
7 CPU and console controller (TTO) status where:

Bits 0-12 are reserved for future use.

Bit 13 is status of the carry bit when the console debug option received control.

Bit 14 is status of Interrupt On flag when the console debug option received control

Bit 15 is status of TTO Done flag when the console debug option received control

10 Address of a location in the first 256 words of main memory that can be used by the console debug option for breakpoint transfers.
11 Address of the most recent breakpoint
12 User instruction at the address of the most recent breakpoint
17 Contents of memory location 0775778
Memory Locations
Address (Octal) Description
2-36 30 word bootstrap loader storage
100 Programmed I/O bootstrap loader start location
377 NIOS instruction loop location for booting from data channel device
077400-077777 The console debug option consists of a program contained in 256 locations of read-only memory (ROM) that respond to addresses 077400-077777
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